The processor-direct slot (PDS) in the Macintosh IIfx is similar to the
PDS in the Macintosh SE/30. It has the same Euro-Din 120 connector as the
Macintosh SE/30 PDS and Macintosh IIci cache connector.
Cards in the PDS are accessed at 20MHz. This speed should let developers
create PDS cards without using expensive components while still providing
access to the processor bus. There are two locations in the memory map for
PDS cards. Developers should see the "Cards and Drivers Manual" for
information on creating PDS cards. This manual is available from APDA.
The cache connector in the Macintosh IIci may look like the Macintosh
IIfx PDS connector, but the pinouts are vastly different.
Note: If a Macintosh IIci cache card is placed in the Macintosh IIfx PDS,
it will damage the logic board.
Here is the Pinout for the 68030 Direct Slot used in the Macintosh IIfx and
SE/30. SE/30 Descriptions, where they are different, come first, followed
by the IIfx description.
A1 - Reserved or GND* Ground
A2 - Reserved or /PDS.MASTER
A3 - /BUSLOCK or Reserved
A4 - /IRQ3 or n.c.
A5 - /IPL2* 68030 IPL2
A6 - /CIOUT* 68030 Cache inhibit out
A7 - /STERM* Sync.cycle termination
A8 - /DSACK1* 68030 Data ack 1
A9 - SIZ1 transfer size bit 1
A10 - /BGACK* 68030 bus grant ack
A11 - FC2 68030 function code 2
A12 - /RESET* System reset
A13 - D0 Data bit 0
A14 - D2 Data bit 2
A15 - D5 Data bit 5
A16 - D8 Data bit 8
A17 - D10 Data bit 10
A18 - D13 Data bit 13
A19 - D16 Data bit 16
A20 - D18 Data bit 18
A21 - D21 Data bit 21
A22 - D24 Data bit 24
A23 - D26 Data bit 26
A24 - D29 Data bit 29
A25 - A31 address bit 31
A26 - A29 address bit 29
A27 - A26 address bit 26
A28 - A23 address bit 23
A29 - A21 address bit 21
A30 - A18 address bit 18
A31 - A15 address bit 15
A32 - A13 address bit 13
A33 - A10 address bit 10
A34 - A7 address bit 7
A35 - A5 address bit 5
A36 - A2 address bit 2
A37 - +5 volts
A38 - CPUCLOCK or Reserved by Apple
A39 - GND
A40 - -12 volts
B1 - Reserved or ECS Early cycle start
B2 - GND or n.c.
B3 - /TM1A or /PDS.BG
B4 - /IRQ2 or /IRQ15
B5 - /IPL1* 68030 IPL1
B6 - /DS* 68030 Data Strobe
B7 - /CBACK* cache burst ack
B8 - /DSACK0* 68030 Data ack 0
B9 - SIZ0 Transfer Size bit 0
B10 - /BG* 68030 bus grant
B11 - FC1 68030 function code 1
B12 - /BERR* Bus error
B13 - +5 volts
B14 - D3 Data bit 3
B15 - D6 Data bit 6
B16 - Ground
B17 - D11 Data bit 11
B18 - D14 Data bit 14
B19 - +5 volts
B20 - D19 Data bit 19
B21 - D22 Data bit 22
B22 - Ground
B23 - D27 Data bit 27
B24 - D30 Data bit 30
B25 - +5 volts
B26 - A28 address bit 28
B27 - A25 address bit 25
B28 - Ground
B29 - A20 address bit 20
B30 - A17 address bit 17
B31 - +5 volts
B32 - A12 address bit 12
B33 - A9 address bit 9
B34 - Ground
B35 - A4 address bit 4
B36 - A1 address bit 1
B37 - +5 volts
B38 - ECLK or n.c.
B39 - GND or /SLOT.E 68030 slot E replace in address map
B40 - -5 volts
C1 - PWROFF or /PFW Shutdown bit
C2 - /NUBUS or n.c.
C3 - /TM0A or /PDS.BR Bus request
C4 - /IRQ1 or /IRQ6
C5 - /IPL0* 68030 IPL0
C6 - /RMC* 68030 read modify cycle
C7 - /CBREQ* 68030 cache burst req
C8 - R/W* 68030 read write
C9 - /AS* 68030 address strobe
C10 - /BR* 68030 bus request
C11 - FC0 68030 function code 0
C12 - /HALT* 68030 Halt
C13 - D1 Data bit 1
C14 - D4 Data bit 4
C15 - D7 Data bit 7
C16 - D9 Data bit 9
C17 - D12 Data bit 12
C18 - D15 Data bit 15
C19 - D17 Data bit 17
C20 - D20 Data bit 20
C21 - D23 Data bit 23
C22 - D25 Data bit 25
C23 - D28 Data bit 28
C24 - D31 Data bit 31
C25 - A30 address bit 30
C26 - A27 address bit 27
C27 - A24 address bit 24
C28 - A22 address bit 22
C29 - A19 address bit 19
C30 - A16 address bit 16
C31 - A14 address bit 14
C32 - A11 address bit 11
C33 - A8 address bit 8
C34 - A6 address bit 6
C35 - A3 address bit 3
C36 - A0 address bit 0
C37 - +5 volts
C38 - C16M or CPUCLK* 20 MHz on the IIfx
C39 - GND
C40 - +12 volts